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<div class="header">
  <div class="headertitle"><div class="title">LTDC_Layer_TypeDef Struct Reference<div class="ingroups"><a class="el" href="group___c_m_s_i_s___device.html">CMSIS_Device</a> &raquo; <a class="el" href="group__stm32h723xx.html">Stm32h723xx</a> &raquo; <a class="el" href="group___peripheral__registers__structures.html">Peripheral_registers_structures</a></div></div></div>
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<p>LCD-TFT Display layer x Controller.  
 <a href="#details">More...</a></p>

<p><code>#include &lt;<a class="el" href="stm32h723xx_8h_source.html">stm32h723xx.h</a>&gt;</code></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-pub-attribs" class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
Public Attributes</h2></td></tr>
<tr class="memitem:a3f9827b30a402fd3d85fe4f4b8eb49c9" id="r_a3f9827b30a402fd3d85fe4f4b8eb49c9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a3f9827b30a402fd3d85fe4f4b8eb49c9">CR</a></td></tr>
<tr class="memitem:a9c72a83598a0ee20148f01a486f54ac0" id="r_a9c72a83598a0ee20148f01a486f54ac0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a9c72a83598a0ee20148f01a486f54ac0">WHPCR</a></td></tr>
<tr class="memitem:aa3238d4c30b3ec500b2007bc061020db" id="r_aa3238d4c30b3ec500b2007bc061020db"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#aa3238d4c30b3ec500b2007bc061020db">WVPCR</a></td></tr>
<tr class="memitem:a1037f0255519c1c6c14af5b17a4de3ca" id="r_a1037f0255519c1c6c14af5b17a4de3ca"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a1037f0255519c1c6c14af5b17a4de3ca">CKCR</a></td></tr>
<tr class="memitem:a401b8bbdd7d666b112a747b1a6d163ae" id="r_a401b8bbdd7d666b112a747b1a6d163ae"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a401b8bbdd7d666b112a747b1a6d163ae">PFCR</a></td></tr>
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<tr class="memitem:ae4673c5b4a2df7b770d82e43b1806ccf" id="r_ae4673c5b4a2df7b770d82e43b1806ccf"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ae4673c5b4a2df7b770d82e43b1806ccf">CFBLR</a></td></tr>
<tr class="memitem:adbd3ad2a70d1578d630acfdb9a526320" id="r_adbd3ad2a70d1578d630acfdb9a526320"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#adbd3ad2a70d1578d630acfdb9a526320">CFBLNR</a></td></tr>
<tr class="memitem:ad08bb6a4577311f9dfcc7a3a15f0c7c9" id="r_ad08bb6a4577311f9dfcc7a3a15f0c7c9"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ad08bb6a4577311f9dfcc7a3a15f0c7c9">RESERVED1</a> [3]</td></tr>
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</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>LCD-TFT Display layer x Controller. </p>
</div><a name="doc-variable-members" id="doc-variable-members"></a><h2 id="header-doc-variable-members" class="groupheader">Member Data Documentation</h2>
<a id="ad597faecb079859e9cdb849c8cf78aec" name="ad597faecb079859e9cdb849c8cf78aec"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad597faecb079859e9cdb849c8cf78aec">&#9670;&#160;</a></span>BFCR</h2>

<div class="memitem">
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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::BFCR</td>
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<p>LTDC Layerx Blending Factors Configuration Register Address offset: 0xA0 </p>

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<a id="af3708f47198ca52e0149584a8c382362" name="af3708f47198ca52e0149584a8c382362"></a>
<h2 class="memtitle"><span class="permalink"><a href="#af3708f47198ca52e0149584a8c382362">&#9670;&#160;</a></span>CACR</h2>

<div class="memitem">
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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::CACR</td>
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<p>LTDC Layerx Constant Alpha Configuration Register Address offset: 0x98 </p>

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<a id="aa79c0c2be9b6f8e4f034d8d5fe8e9345" name="aa79c0c2be9b6f8e4f034d8d5fe8e9345"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa79c0c2be9b6f8e4f034d8d5fe8e9345">&#9670;&#160;</a></span>CFBAR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::CFBAR</td>
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<p>LTDC Layerx Color Frame Buffer Address Register Address offset: 0xAC </p>

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<a id="adbd3ad2a70d1578d630acfdb9a526320" name="adbd3ad2a70d1578d630acfdb9a526320"></a>
<h2 class="memtitle"><span class="permalink"><a href="#adbd3ad2a70d1578d630acfdb9a526320">&#9670;&#160;</a></span>CFBLNR</h2>

<div class="memitem">
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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::CFBLNR</td>
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<p>LTDC Layerx ColorFrame Buffer Line Number Register Address offset: 0xB4 </p>

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<a id="ae4673c5b4a2df7b770d82e43b1806ccf" name="ae4673c5b4a2df7b770d82e43b1806ccf"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae4673c5b4a2df7b770d82e43b1806ccf">&#9670;&#160;</a></span>CFBLR</h2>

<div class="memitem">
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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::CFBLR</td>
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<p>LTDC Layerx Color Frame Buffer Length Register Address offset: 0xB0 </p>

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<a id="a1037f0255519c1c6c14af5b17a4de3ca" name="a1037f0255519c1c6c14af5b17a4de3ca"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1037f0255519c1c6c14af5b17a4de3ca">&#9670;&#160;</a></span>CKCR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::CKCR</td>
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<p>LTDC Layerx Color Keying Configuration Register Address offset: 0x90 </p>

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<a id="ae4ce84d11912847542fcdc03ae337176" name="ae4ce84d11912847542fcdc03ae337176"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ae4ce84d11912847542fcdc03ae337176">&#9670;&#160;</a></span>CLUTWR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::CLUTWR</td>
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<p>LTDC Layerx CLUT Write Register Address offset: 0x144 </p>

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<a id="a3f9827b30a402fd3d85fe4f4b8eb49c9" name="a3f9827b30a402fd3d85fe4f4b8eb49c9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a3f9827b30a402fd3d85fe4f4b8eb49c9">&#9670;&#160;</a></span>CR</h2>

<div class="memitem">
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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::CR</td>
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<p>LTDC Layerx Control Register Address offset: 0x84 </p>

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<a id="aaedb1dc65cb10a98f4c53f162b19bb39" name="aaedb1dc65cb10a98f4c53f162b19bb39"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aaedb1dc65cb10a98f4c53f162b19bb39">&#9670;&#160;</a></span>DCCR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::DCCR</td>
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<p>LTDC Layerx Default Color Configuration Register Address offset: 0x9C </p>

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<a id="a401b8bbdd7d666b112a747b1a6d163ae" name="a401b8bbdd7d666b112a747b1a6d163ae"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a401b8bbdd7d666b112a747b1a6d163ae">&#9670;&#160;</a></span>PFCR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::PFCR</td>
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<p>LTDC Layerx Pixel Format Configuration Register Address offset: 0x94 </p>

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<a id="a69d1bd327c7b02f9a1c9372992939406" name="a69d1bd327c7b02f9a1c9372992939406"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a69d1bd327c7b02f9a1c9372992939406">&#9670;&#160;</a></span>RESERVED0</h2>

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          <td class="memname">uint32_t LTDC_Layer_TypeDef::RESERVED0[2]</td>
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<p>Reserved </p>

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<a id="ad08bb6a4577311f9dfcc7a3a15f0c7c9" name="ad08bb6a4577311f9dfcc7a3a15f0c7c9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ad08bb6a4577311f9dfcc7a3a15f0c7c9">&#9670;&#160;</a></span>RESERVED1</h2>

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<p>Reserved </p>

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<a id="a9c72a83598a0ee20148f01a486f54ac0" name="a9c72a83598a0ee20148f01a486f54ac0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a9c72a83598a0ee20148f01a486f54ac0">&#9670;&#160;</a></span>WHPCR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::WHPCR</td>
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<p>LTDC Layerx Window Horizontal Position Configuration Register Address offset: 0x88 </p>

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<a id="aa3238d4c30b3ec500b2007bc061020db" name="aa3238d4c30b3ec500b2007bc061020db"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa3238d4c30b3ec500b2007bc061020db">&#9670;&#160;</a></span>WVPCR</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t LTDC_Layer_TypeDef::WVPCR</td>
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<p>LTDC Layerx Window Vertical Position Configuration Register Address offset: 0x8C </p>

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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/CMSIS/Device/ST/STM32H7xx/Include/<a class="el" href="stm32h723xx_8h_source.html">stm32h723xx.h</a></li>
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